[data from a 500 MHz Celeron]

PERFCTR INIT: vendor 0, family 6, model 6, stepping 5, clock 498648 kHz
PERFCTR INIT: NITER == 64
PERFCTR INIT: loop overhead is 170 cycles
PERFCTR INIT: rdtsc cost is 34.3 cycles (2367 total)
PERFCTR INIT: rdpmc cost is 29.9 cycles (2087 total)
PERFCTR INIT: rdmsr (counter) cost is 82.4 cycles (5444 total)
PERFCTR INIT: rdmsr (evntsel) cost is 70.6 cycles (4689 total)
PERFCTR INIT: wrmsr (counter) cost is 88.2 cycles (5819 total)
PERFCTR INIT: wrmsr (evntsel) cost is 79.9 cycles (5285 total)
PERFCTR INIT: read cr4 cost is 2.0 cycles (301 total)
PERFCTR INIT: write cr4 cost is 42.2 cycles (2874 total)
PERFCTR INIT: write LVTPC cost is 37.6 cycles (2580 total)
PERFCTR INIT: sync_core cost is 77.3 cycles (5120 total)
